• IPC J-STD-012

IPC J-STD-012

Implementation of Flip Chip and Chip Scale Technology

Association Connecting Electronics Industries, 01/01/1996

Publisher: IPC

File Format: PDF

$91.00$182.00


Published:01/01/1996

Pages:105

File Size:1 file , 4.7 MB

Note:This product is unavailable in Russia, Ukraine, Belarus

This informative document describes the implementation of flip chip and related chip scale semiconductor packaging technologies. The areas discussed include design considerations, assembly processes, technology choices, application and reliability data. Chip packaging variations include flip chip, HDI, micro BGA, micro SMT and SLICC. Also provides general information on implementing flip chip and chip scale technologies for creating multichip modules, I/C cards, memory cards and very dense surface mount assemblies. Co- developed by IPC, EIA, MCNC and Sematech.

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