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JEDEC Solid State Technology Association, 01/05/2023
Publisher: JEDEC
File Format: PDF
$146.00$292.43
Published:05/01/2023
Pages:63
File Size:1 file , 1.2 MB
Note:This product is unavailable in Russia, Ukraine, Belarus
This document establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin-film circuits, surface acoustic wave (SAW) devices, optoelectronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this standard. The devices shall be assembled into a package similar to that expected in the final application to perform the tests. This CDM document does not apply to socketed discharge model testers. The purpose (objective) of this document is to establish a test method that will replicate CDM failures and provide reliable, repeatable CDM ESD test results from tester to tester, regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels.
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