JEDEC JEB 15

TERMINOLOGY AND METHODS OF MEASUREMENT FOR BISTABLE SEMICONDUCTOR MICROCIRCUITS

JEDEC Solid State Technology Association, 11/01/1969

Publisher: JEDEC

File Format: PDF

$70.00$141.00

Description

Published:01/11/1969

Pages:97

File Size:1 file

Note:This product is unavailable in Russia, Ukraine, Belarus

This bulletin explains the terminology and methods of measurement for bistable semiconductor microcircuits. It is also intended to be used with the EIA Registration Data Format for semiconductor integrated bistable logic circuits.

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