• JEDEC JEP116

JEDEC JEP116

CMOS SEMICUSTOM DESIGN GUIDELINES

JEDEC Solid State Technology Association, 11/01/1991

Publisher: JEDEC

File Format: PDF

$70.00$141.00


Published:01/11/1991

Pages:86

File Size:1 file , 3.4 MB

Note:This product is unavailable in Russia, Ukraine, Belarus

The design of ASIC circuits is becoming a significant part of system or product design, yet many problems continue to exist in current design practice. The guidelines in this document provide an explanation of common ASIC design problems and concerns and where possible offer solutions.

More JEDEC standard pdf

JEDEC JESD85

JEDEC JESD85

METHODS FOR CALCULATING FAILURE RATES IN UNITS OF FITS

$36.00 $72.00

JEDEC JESD82-2

JEDEC JESD82-2

STANDARD FOR DESCRIPTION OF A 3.3 V, 18-BIT, LVTTL I/O REGISTER FOR PC133 REGISTERED DIMM APPLICATIONS

$28.00 $56.00

JEDEC JESD22-A109A

JEDEC JESD22-A109A

HERMETICITY

$27.00 $54.00

JEDEC JESD76-1

JEDEC JESD76-1

STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (WIDE RANGE OPERATION)

$24.00 $48.00