• JEDEC JEP116

JEDEC JEP116

CMOS SEMICUSTOM DESIGN GUIDELINES

JEDEC Solid State Technology Association, 11/01/1991

Publisher: JEDEC

File Format: PDF

$70.00$141.00


Published:01/11/1991

Pages:86

File Size:1 file , 3.4 MB

Note:This product is unavailable in Russia, Ukraine, Belarus

The design of ASIC circuits is becoming a significant part of system or product design, yet many problems continue to exist in current design practice. The guidelines in this document provide an explanation of common ASIC design problems and concerns and where possible offer solutions.

More JEDEC standard pdf

JEDEC JEP114A

JEDEC JEP114A

Guidelines for Particle Impact Noise Detection (PIND) Testing, Operator Training, and Certification

$127.00 $254.29

JEDEC JESD22-A104F.01

JEDEC JESD22-A104F.01

Temperature Cycling

$139.00 $279.57

JEDEC JESD82-28A.01

JEDEC JESD82-28A.01

Fully Buffered DIMM Design for Test, Design for Validation (DFx)

$126.00 $253.65

JEDEC JESD401-5A

JEDEC JESD401-5A

DDR5 DIMM Labels

$134.00 $269.07