JEDEC JEP156

CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION

JEDEC Solid State Technology Association, 03/01/2009

Publisher: JEDEC

File Format: PDF

$33.00$67.00

Description

Published:01/03/2009

Pages:24

File Size:1 file , 150 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as well as individual solid state surface-mount products.

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