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JEDEC Solid State Technology Association, 12/01/2022
Publisher: JEDEC
File Format: PDF
$147.00$294.62
Published:01/12/2022
Pages:16
File Size:1 file , 760 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
For SiC MOSFET, the gate-charge characteristic behaves different to conventional silicon power MOSFETs. The most distinct point is the absence of a real Miller plateau. Due to short n-channels, which are typically used in SiC MOSFETs, practically a Miller “ramp” is measured. The standard QG extraction methods [1] cannot be easily applied. Furthermore, the presence of a VGS,TH hysteresis [2] makes it necessary to define clearly the starting gate voltage for QG measurement and extraction. The following document defines a QGS,TOT, QGD and QGS,TH which can be extracted from a measured QG waveform.
The test and extraction method can be applied to the following: •N-Channel SiC MOSFET (vertical structure) •Wafer and package levels
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