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JEDEC Solid State Technology Association, 02/01/2023
Publisher: JEDEC
File Format: PDF
$121.00$242.39
Published:01/02/2023
Pages:30
File Size:1 file , 670 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
This document provides guidelines for evaluating gate reliability and lifetime testing for silicon carbide (SiC) based power devices with a gate oxide or gate dielectric.
ELECTROSTATIC DISCHARGE (ESD) SENSITIVITY TESTING MACHINE MODEL (MM)
$27.00 $54.00
FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICES
$70.00 $141.00
A Guideline for Defining "Low-Halogen" Solid State Devices (Removal of BFR/CFR/PVC)
EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES
$29.00 $59.00
