• JEDEC JESD 22-B108A

JEDEC JESD 22-B108A

COPLANARITY TEST FOR SURFACE-MOUNT SEMICONDUCTOR DEVICES

JEDEC Solid State Technology Association, 01/01/2003

Publisher: JEDEC

File Format: PDF

$26.00$53.00


Published:01/01/2003

Pages:11

File Size:1 file , 69 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity for surface-mount semiconductor devices.

More JEDEC standard pdf

JEDEC JESD70

JEDEC JESD70

2.5 V BiCMOS LOGIC DEVICE FAMILY SPECIFICATION WITH 5 V TOLERANT INPUTS AND OUTPUTS

$26.00 $53.00

JEDEC JESD71

JEDEC JESD71

STANDARD TEST AND PROGRAMMING LANGUAGE (STAPL)

$43.00 $87.00

JEDEC JESD73

JEDEC JESD73

DESCRIPTION OF 5 V BUS SWITCH WITH TTL-COMPATIBLE CONTROL INPUTS

$25.00 $51.00

JEDEC JEP113-B

JEDEC JEP113-B

SYMBOL AND LABELS FOR MOISTURE-SENSITIVE DEVICES

$108.00 $216.07