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  • JEDEC JESD 47G.01

JEDEC JESD 47G.01

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 04/01/2010

Publisher: JEDEC

File Format: PDF

$33.00$67.00


Published:01/04/2010

Pages:26

File Size:1 file , 240 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed.

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