• JEDEC JESD 82-24

JEDEC JESD 82-24

DEFINITION OF the SSTUB32865 28-bit 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS

JEDEC Solid State Technology Association, 05/01/2007

Publisher: JEDEC

File Format: PDF

$36.00$72.00


Published:01/05/2007

Pages:29

File Size:1 file , 220 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 RDIMM applications. The SSTUB32865 is identical in functionality to the SSTU32865 but specifies tighter timing characteristics and a higher application frequency of up to 410MHz.

More JEDEC standard pdf

JEDEC JESD 31C

JEDEC JESD 31C

GENERAL REQUIREMENTS FOR DISTRIBUTORS OF COMMERCIAL AND MILITARY SEMICONDUCTOR DEVICES

$33.00 $67.00

JEDEC JESD8-15A

JEDEC JESD8-15A

STUB SERIES TERMINATED LOGIC FOR 1.8 V (SSTL_18)

$31.00 $62.00

JEDEC JESD92

JEDEC JESD92

PROCEDURE FOR CHARACTERIZING TIME-DEPENDENT DIELECTRIC BREAKDOWN OF ULTRA-THIN GATE DIELECTRICS

$37.00 $74.00

JEDEC JEP119A

JEDEC JEP119A

A PROCEDURE FOR EXECUTING SWEAT

$37.00 $74.00