Your shopping cart is empty!
JEDEC Solid State Technology Association, 03/01/2009
Publisher: JEDEC
File Format: PDF
$29.00$59.00
Published:01/03/2009
Pages:18
File Size:1 file , 160 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
Thermal Test Chip Guideline (Wire Bond Type Chip)
$33.00 $67.00
Mechanical Shock - Device and Subassembly
$27.00 $54.00
.05 Low Voltage Swing Terminated Logic (LVSTL05)
$100.00 $201.16
NAND Flash Interface Interopability
$58.00 $116.00