• JEDEC JESD22-A105D

JEDEC JESD22-A105D

POWER AND TEMPERATURE CYCLING

JEDEC Solid State Technology Association, 01/01/2020

Publisher: JEDEC

File Format: PDF

$26.00$53.00


Published:01/01/2020

Pages:12

File Size:1 file , 260 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes and simultaneously the operating biases are periodically applied and removed. It is intended to simulate worst case conditions encountered in application environments. The power and temperature cycling test is considered destructive and is only intended for device qualification. This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures.

More JEDEC standard pdf

JEDEC JEP137B

JEDEC JEP137B

COMMON FLASH INTERFACE (CFI) IDENTIFICATION CODES

$26.00 $53.00

JEDEC JESD75-4

JEDEC JESD75-4

BALL GRID ARRAY PINOUT FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS

$26.00 $53.00

JEDEC JESD64-A

JEDEC JESD64-A

STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES WITH 3.6 V CMOS TOLERANT INPUTS AND OUTPUTS

$25.00 $51.00

JEDEC JESD82

JEDEC JESD82

DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONS

$29.00 $59.00