• JEDEC JESD22-B109A

JEDEC JESD22-B109A

FLIP CHIP TENSILE PULL

JEDEC Solid State Technology Association, 01/01/2009

Publisher: JEDEC

File Format: PDF

$28.00$56.00


Published:01/01/2009

Pages:16

File Size:1 file , 67 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

The Flip Chip Tensile Pull Test Method is performed to determine the fracture mode and strength of the solder bump interconnection between the flip chip die and the substrate. It should be used to assess the consistency of the chip join process. This test method is a destructive test,

More JEDEC standard pdf

JEDEC JESD22-A110E

JEDEC JESD22-A110E

HIGHLY ACCELERATED TEMPERATURE AND HUMIDITY STRESS TEST (HAST)

$27.00 $54.00

JEDEC JESD8-28

JEDEC JESD8-28

300 mV INTERFACE

$25.00 $51.00

JEDEC JS-002-2014

JEDEC JS-002-2014

ANSI/ESDA/JEDEC Joint Standard for Electrostatic Discharge Sensitivity Testing, Charged Device MOdel (CDM) - Device Level

$29.00 $59.00

JEDEC JESD84-B51

JEDEC JESD84-B51

Embedded Multi-media card (e*MMC), Electrical Standard (5.1)

$163.00 $327.00