JEDEC JESD22-B112A

PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATURE

JEDEC Solid State Technology Association, 10/01/2009

Publisher: JEDEC

File Format: PDF

$37.00$74.00

Description

Published:01/10/2009

Pages:30

File Size:1 file , 1 MB

Note:This product is unavailable in Russia, Ukraine, Belarus

The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation.

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