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JEDEC Solid State Technology Association, 12/01/2011
Publisher: JEDEC
File Format: PDF
$58.00$116.00
Published:01/12/2011
Pages:74
File Size:1 file , 1.1 MB
Note:This product is unavailable in Russia, Ukraine, Belarus
ADDENDUM No. 2 to JESD35 - TEST CRITERIA FOR THE WAFER-LEVEL TESTING OF THIN DIELECTRICS
$27.00 $54.00
INTEGRATED CIRCUIT THERMAL MEASUREMENT METHOD - ELECTRICAL TEST METHOD (SINGLE SEMICONDUCTOR DEVICE)
$39.00 $78.00
STANDARD FOR FAILURE ANALYSIS REPORT FORMAT
STANDARD FOR DESCRIPTION OF LOW VOLTAGE TTL-COMPATIBLE CMOS LOGIC DEVICES
$28.00 $56.00