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JEDEC Solid State Technology Association, 10/01/2022
Publisher: JEDEC
File Format: PDF
$115.00$231.15
Published:01/10/2022
Pages:134
File Size:1 file , 3.2 MB
Note:This product is unavailable in Russia, Ukraine, Belarus
This standard was jointly developed by JEDEC and the Open NAND Flash Interface Workgroup, hereafter referred to as ONFI. This standard defines a standard NAND flash device interface interoperability standard that provides means for system be designed that can support Asynchronous SDR, Synchronous DDR and Toggle DDR NAND flash devices that are interoperable between JEDEC and ONFI member implementations.
TEST BOARDS FOR AREA ARRAY SURFACE MOUNT PACKAGE THERMAL MEASUREMENTS
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INDEX OF TERMS DEFINED IN JEDEC PUBLICATIONS
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DESCRIPTION OF 1.8 V CMOS LOGIC DEVICES
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STANDARD FOR MEASURING FORWARD SWITCHING CHARACTERISTICS OF SEMICONDUCTOR DIODES
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