Your shopping cart is empty!
PDF Preview
JEDEC Solid State Technology Association, 05/01/2023
Publisher: JEDEC
File Format: PDF
$136.00$273.55
Published:01/05/2023
File Size:1 file , 3.3 MB
Note:This product is unavailable in Russia, Belarus
This standard was jointly developed by JEDEC and the Open NAND Flash Interface Workgroup, hereafter referred to as ONFI. This standard defines a standard NAND flash device interface interoperability standard that provides means for system be designed that can support Asynchronous SDR, Synchronous DDR and Toggle DDR NAND flash devices that are interoperable between JEDEC and ONFI member implementations.
Guidelines for Visual Inspection and Control of Flip Chip Type Components (FCxGA)
$29.00 $59.00
RF Biased Life (RFBL) Test Method
$30.00 $60.00
Terms, Definitions, and Letter Symbols for Microelectronic Devices
$81.00 $163.00
System Level ESD: Part II: Implementation of Effective ESD Robust Designs
$95.00 $191.00