Your shopping cart is empty!
PDF Preview
JEDEC Solid State Technology Association, 03/01/2023
Publisher: JEDEC
File Format: PDF
$148.00$297.63
Published:01/03/2023
Pages:208
File Size:1 file , 2.2 MB
Note:This product is unavailable in Russia, Belarus
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers to the device specified by this document.
The purpose is to provide a standard for the PMIC5000, PMIC5010 device for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
Unless otherwise noted in the document, any illegal operation is not allowed and device operation is not guaranteed.
NOTE: The designation PMIC5000, PMIC5010 refers to a portion of the part number designation of a series of commercial logic devices common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.
Charged Device Model Testing of Integrated Circuits
$145.00 $291.54
For Electrostatic Discharge Sensitivity Testing Charged Device Model (CDM) Device Level
$146.00 $292.43
High Bandwidth Memory DRAM (HBM3)
$147.00 $295.25
Guidelines for Measuring the Threshold Voltage (VT) of SiC MOSFETs
$104.00 $209.99