Your shopping cart is empty!
JEDEC Solid State Technology Association, 11/01/1967
Publisher: JEDEC
File Format: PDF
$27.00$54.00
Published:01/11/1967
Pages:13
File Size:1 file , 410 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGIC
$40.00 $80.00
ADDENDUM No. 2 to JESD8 - STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS
$25.00 $51.00
CONDITIONS FOR MEASUREMENT OF DIODE STATIC PARAMETERS
$23.00 $47.00
GUIDELINES FOR GaAs MMIC AND FET LIFE TESTING
$30.00 $60.00