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JEDEC Solid State Technology Association, 03/01/2022
Publisher: JEDEC
File Format: PDF
$31.00$62.00
Published:01/03/2022
Pages:22
File Size:1 file , 370 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
This document specifies standard temperature ranges that may be used, by way of referencing JESD402-1, in other standards, specifications, and datasheets when defining temperature related specifications.
ADDENDUM No. 3 to JESD24 - THERMAL IMPEDANCE MEASUREMENTS FOR VERTICAL POWER MOSFETS (DELTA SOURCE-DRAIN VOLTAGE METHOD)
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STANDARD FOR DESCRIPTION OF 54/74ACXXXXX AND 54/74ACTXXXXX ADVANCED HIGH-SPEED CMOS DEVICES
$95.00 $191.00
ADDENDUM No. 5 to JESD24 - SINGLE PULSE UNCLAMPED INDUCTIVE SWITCHING (UIS) AVALANCHE TEST METHOD
$24.00 $48.00
ADDENDUM No. 1 to JESD24 - METHOD FOR MEASUREMENT OF POWER DEVICE TURN-OFF SWITCHING LOSS
$26.00 $53.00
