JEDEC JESD47I.01

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 10/01/2016

Publisher: JEDEC

File Format: PDF

$36.00$72.00

Description

Published:01/10/2016

Pages:28

File Size:1 file , 280 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed. This is a minor editorial revision to JESD47I, published December 2015.

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