JEDEC JESD47J

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 08/01/2017

Publisher: JEDEC

File Format: PDF

$37.00$74.00


Published:01/08/2017

Pages:30

File Size:1 file , 290 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed.

More JEDEC standard pdf

JEDEC JESD51-50A

JEDEC JESD51-50A

Overview of Methodologies for the Thermal Measurement of Single- and Multi-Chip, Single- and Multi-PN-Junction Light-Emotting Diodes (LEDs)

$105.00 $210.68

JEDEC JESD51-52A

JEDEC JESD51-52A

GUIDELINES FOR COMBINING CIE 127:2007 / 225:2017 TOTAL FLUX MEASUREMENTS WITH THERMAL MEASUREMENTS OF LEDS WITH EXPOSED COOLING SURFACE

$124.00 $249.71

JEDEC JESD625C

JEDEC JESD625C

REQUIREMENTS FOR HANDLING ELECTROSTATIC-DISCHARGE-SENSITIVE (ESDS) DEVICES

$137.00 $274.40

JEDEC JESD301-2

JEDEC JESD301-2

PMIC5100 POWER MANAGEMENT IC STANDARD, Rev 1.03

$103.00 $207.10