JEDEC JESD47J.01

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 09/01/2017

Publisher: JEDEC

File Format: PDF

$37.00$74.00

Description

Published:01/09/2017

Pages:30

File Size:1 file , 290 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed.

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