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JEDEC Solid State Technology Association, 12/01/1995
Publisher: JEDEC
File Format: PDF
$25.00$51.00
Published:01/12/1995
Pages:9
File Size:1 file , 150 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
GUIDELINE FOR DEVELOPING AND DOCUMENTING PACKAGE ELECTRICAL MODELS DERIVED FROM COMPUTATIONAL ANALYSIS
$24.00 $48.00
STANDARD FOR DESCRIPTION OF 54/74ABTXXX AND 74BCXXX TTL-COMPATIBLE BiCMOS LOGIC DEVICES
$39.00 $78.00
METHODOLOGY FOR THE THERMAL MEASUREMENT OF COMPONENT PACKAGES (SINGLE SEMICONDUCTOR DEVICE)
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ADDENDUM No. 2 to JESD35 - TEST CRITERIA FOR THE WAFER-LEVEL TESTING OF THIN DIELECTRICS
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