JEDEC JESD51-4A

Thermal Test Chip Guideline (Wire Bond Type Chip)

JEDEC Solid State Technology Association, 06/01/2019

Publisher: JEDEC

File Format: PDF

$33.00$67.00


Published:01/06/2019

Pages:26

File Size:1 file , 1.2 MB

Note:This product is unavailable in Russia, Ukraine, Belarus

The purpose of this document is to provide a design guideline for thermal test chips used for integrated circuit (IC) and transistor package thermal characterization and investigations. The intent of this guideline is to minimize the differences in data gathered due to nonstandard test chips and to provide a well-defined reference for thermal investigations.

More JEDEC standard pdf

JEDEC JESD8-21C

JEDEC JESD8-21C

POD135 - 1.35 V Pseudo Open Drain I/O

$33.00 $67.00

JEDEC JESD8-30A

JEDEC JESD8-30A

POD125 - 1.25 V Pseudo Open Drain I/O

$30.00 $60.00

JEDEC JESD51-4A

JEDEC JESD51-4A

Thermal Test Chip Guideline (Wire Bond Type Chip)

$33.00 $67.00

JEDEC JESD22-B110B.01

JEDEC JESD22-B110B.01

Mechanical Shock - Device and Subassembly

$27.00 $54.00