• JEDEC JESD61A.01

JEDEC JESD61A.01

ISOTHERMAL ELECTROMIGRATION TEST PROCEDURE

JEDEC Solid State Technology Association, 10/01/2007

Publisher: JEDEC

File Format: PDF

$43.00$87.00


Published:01/10/2007

Pages:49

File Size:1 file , 480 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes an algorithm for the execution of the isothermal test, using computer-controlled instrumentation. The primary use of this test is for the monitoring of microelectronic metallization lines at wafer level (1) in process development, to evaluate process options, (2) in manufacturing, to monitor metallization reliability and (3) to monitor/evaluate process equipment. While it is developed as a fast WLR test, it can also be an effective tool for complementing the reliability data obtained through the standard package level electromigration test.

More JEDEC standard pdf

JEDEC JESD223

JEDEC JESD223

Universal Flash Storage (UFS) Host Controller Interface

$45.00 $91.00

JEDEC JS709

JEDEC JS709

JOINT JEDEC/ECA STANDARD, DEFINING "LOW-HALOGEN" PASSIVES AND SOLID STATE DEVICES (Removal of BFR/CFR/PVC)

$30.00 $60.00

JEDEC JESD22-B105D

JEDEC JESD22-B105D

Lead Integrity

$31.00 $62.00

JEDEC JESD84-B45

JEDEC JESD84-B45

Embedded Multi-media card (e*MMC), Electrical Standard (4.5 Device)

$142.00 $284.00