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  • JEDEC JESD75-6

JEDEC JESD75-6

PSO-N/PQFN PINOUTS STANDARDIZED FOR 14-, 16-, 20-, AND 24-LEAD LOGIC FUNCTIONS

JEDEC Solid State Technology Association, 03/01/2006

Publisher: JEDEC

File Format: PDF

$26.00$53.00


Published:01/03/2006

Pages:11

File Size:1 file , 84 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines device pinouts for 14-, 16-, 20-, and 24-lead logic functions. This pinout standard specifically applies to the conversion of DIP-packaged logic devices to PSO-N/PQFN packages logic devices. The purpose of this standard is to provide a pinout standard for 14-, 16-, 20-, and 24-lead logic devices offered in 14-, 16-, 20-, and 24-lead PSO-N/PQFN packages for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

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