• JEDEC JESD78D

JEDEC JESD78D

IC LATCH-UP TEST

JEDEC Solid State Technology Association, 11/01/2011

Publisher: JEDEC

File Format: PDF

$37.00$74.00


Published:01/11/2011

Pages:30

File Size:1 file , 210 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard has been adopted by the Defense Logistics Agency (DLA) as project 5962-1880. This standard covers the I-test and the overvoltage latch-up testing of integrated circuits. The purpose of this specification is to establish a method for determining IC latch-up characteristics and to define latch-up failure criteria. Latch-up characteristics are extremely important in determining product reliability and minimizing No Trouble Found (NTF) and Electrical Overstress (EOS) failures due to latch-up. This test method is applicable to NMOS, CMOS, bipolar, and all variations and combinations of these technologies.

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