JEDEC JESD8-2

ADDENDUM No. 2 to JESD8 - STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 03/01/1993

Publisher: JEDEC

File Format: PDF

$25.00$51.00

Description

Published:01/03/1993

Pages:9

File Size:1 file

Note:This product is unavailable in Russia, Ukraine, Belarus

This Addendum No. 2 to JEDEC Standard No. 8 provides standard operating voltage and interface levels that can be used by designers and application engineers as they develop and introduce new products. Covers the ECL logic family designated 300K ECL. The 300K ECL family is Voltage and Temperature Compensated, with I/O interface levels compatible with the existing 100K ECL and 101K ECl families.