• JEDEC JESD8-26

JEDEC JESD8-26

1.2 V High-Speed LVCMOS (HS_LVCMOS) Interface

JEDEC Solid State Technology Association, 09/01/2011

Publisher: JEDEC

File Format: PDF

$24.00$48.00


Published:01/09/2011

Pages:8

File Size:1 file , 190 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines the dc and ac input levels, output levels, and input overshoot and undershoot specifications for the 1.2 V High-speed LVCMOS (HS_LVCMOS) interface. The non-terminated interface has a switching range that is nominally expected to be 0 V to 1.2 V and is primarily intended to support communications with Wide I/O SDRAM devices.

More JEDEC standard pdf

JEDEC JESD28-A

JEDEC JESD28-A

A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION UNDER DC STRESS

$29.00 $59.00

JEDEC JESD73-3

JEDEC JESD73-3

STANDARD FOR DESCRIPTION OF 3867 - 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCH

$25.00 $51.00

JEDEC JESD8-13

JEDEC JESD8-13

SCALABLE LOW-VOLTAGE SIGNALING FOR 400 MV (SLVS-400)

$26.00 $53.00

JEDEC JESD75-1

JEDEC JESD75-1

BALL GRID ARRAY PINOUTS STANDARDIZED FOR 16, 18, AND 20-BIT LOGIC FUNCTIONS USING A 54 BALL PACKAGE

$24.00 $48.00