• JEDEC JESD8-28

JEDEC JESD8-28

300 mV INTERFACE

JEDEC Solid State Technology Association, 06/01/2015

Publisher: JEDEC

File Format: PDF

$25.00$51.00


Published:01/06/2015

Pages:10

File Size:1 file , 61 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard is to define and interface with a CMOS rail to rail signal that uses a 300 mV signal swing. This specification defines the maximum signaling rate, the signal levels, overshoot and undershoot limits, and the maximum input capacitance. This interface is useful in short distance applications, typically of less than 5 mm.

More JEDEC standard pdf

JEDEC JESD57

JEDEC JESD57

TEST PROCEDURE FOR THE MANAGEMENT OF SINGLE-EVENT EFFECTS IN SEMICONDUCTOR DEVICES FROM HEAVY ION IRRADIATION

$43.00 $87.00

JEDEC JESD 24-11 (R2002)

JEDEC JESD 24-11 (R2002)

ADDENDUM No. 11 to JESD24 - POWER MOSFET EQUIVALENT SERIES GATE RESISTANCE TEST METHOD

$24.00 $48.00

JEDEC JEP128

JEDEC JEP128

GUIDE FOR STANDARD PROBE PAD SIZES AND LAYOUTS FOR WAFER LEVEL ELECTRICAL TESTING

$25.00 $51.00

JEDEC JESD8-8

JEDEC JESD8-8

ADDENDUM No. 8 to JESD8 - STUB SERIES TERMINATED LOGIC FOR 3.3 VOLTS (SSTL_3) A 3.3 V VOLTAGE BASED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS

$29.00 $59.00