• JEDEC JESD8-33

JEDEC JESD8-33

.05 Low Voltage Swing Terminated Logic (LVSTL05)

JEDEC Solid State Technology Association, 06/01/2019

Publisher: JEDEC

File Format: PDF

$100.00$201.16


Published:01/06/2019

Pages:10

File Size:1 file , 130 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines power supply voltage range, dc interface, switching parameter and overshoot/undershoot for high speed low voltage swing terminated NMOS driver family digital circuits. The specifications in this standard represent a minimum set of interface specifications for low voltage terminated circuits. Item 159.03

More JEDEC standard pdf

JEDEC JESD235A

JEDEC JESD235A

HIgh Bandwidth Memory (HBM) DRAM

$104.00 $208.00

JEDEC JESD232

JEDEC JESD232

Graphics Double Data Rate (GDDR5X) SGRAM Standard

$104.00 $208.00

JEDEC JESD209-4A

JEDEC JESD209-4A

Low Power Double Data Rate 4 (LPDDR4)

$142.00 $284.00

JEDEC JESD22-A103E

JEDEC JESD22-A103E

HIGH TEMPERATURE STORAGE LIFE

$26.00 $53.00