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  • JEDEC JESD82-15

JEDEC JESD82-15

STANDARD FOR DEFINITION OF CUA878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS

JEDEC Solid State Technology Association, 11/01/2005

Publisher: JEDEC

File Format: PDF

$31.00$62.00


Published:01/11/2005

Pages:21

File Size:1 file , 170 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of a CUA878 PLL clock device for registered DDR2 DIMM applications. The purpose is to provide a standard for a CUA878 PLL clock device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

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