JEDEC JESD82-3B.01

DEFINITION OF THE SSTV16857 2.5 V, 14-BIT SSTL_2 REGISTERED BUFFER FOR DDR DIMM APPLICATIONS

JEDEC Solid State Technology Association, 01/01/2023

Publisher: JEDEC

File Format: PDF

$121.00$242.39


Published:01/01/2023

Pages:20

File Size:1 file , 390 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTVN16857 14-bit SSTL_2 registered buffer for PC1600, PC2100, PC2700, and PC3200 DDR DIMM applications.

The purpose is to provide a standard for the SSTVN16857 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

NOTE The designation SSTVN16857 refers to the part designation of a series of commercial logic parts common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.

More JEDEC standard pdf

JEDEC JEP132 (R2007)

JEDEC JEP132 (R2007)

PROCESS CHARACTERIZATION GUIDELINE

$38.00 $76.00

JEDEC JESD63

JEDEC JESD63

STANDARD METHOD FOR CALCULATING THE ELECTROMIGRATION MODEL PARAMETERS FOR CURRENT DENSITY AND TEMPERATURE

$39.00 $78.00

JEDEC JESD59

JEDEC JESD59

BOND WIRE MODELING STANDARD

$28.00 $56.00

JEDEC EIA 670

JEDEC EIA 670

QUALITY SYSTEM ASSESSMENT (SUPERSEDES JESD39-A)

$40.00 $80.00