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JEDEC Solid State Technology Association, 01/01/2023
Publisher: JEDEC
File Format: PDF
$28.00$57.00
Published:01/01/2023
Pages:22
File Size:1 file , 490 KB
Note:This product is unavailable in Russia, Ukraine, Belarus
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTU32864 configurable registered buffer for DDR2 RDIMM applications.
The purpose is to provide a standard for the SSTU32864 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
NOTE The designation SSTU32864 refers to the part designation of a series of commercial logic parts common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.
DDR4 DATA BUFFER DEFINITION (DDR4DB01)
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SYMBOL AND LABEL FOR ELECTROSTATIC SENSITIVE DEVICES
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DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
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CUSTOMER NOTIFICATION OF PRODUCT/PROCESS CHANGES BY ELECTRONIC PRODUCT SUPPLIERS
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