• Your shopping cart is empty!

  • JEDEC JS 9702

JEDEC JS 9702

IPC/JEDEC-9702: MONOTONIC BEND CHARACTERIZATION OF BOARD-LEVEL INTERCONNECTS (IPC/JEDEC-9702)

JEDEC Solid State Technology Association, 06/01/2004

Publisher: JEDEC

File Format: PDF

$30.00$60.00


Published:01/06/2004

Pages:19

File Size:1 file , 230 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This publication specifies a common method of establishing the fracture resistance of board-level device interconnects to flexural loading during non-cyclic board assembly and test operations. Monotonic bend test qualification pass/fail requirements are typically specific to each device application and are outside the scope of this document.

More JEDEC standard pdf

JEDEC JESD22-A103C

JEDEC JESD22-A103C

HIGH TEMPERATURE STORAGE LIFE

$25.00 $51.00

JEDEC JESD 22-B110A (R2009)

JEDEC JESD 22-B110A (R2009)

SUBASSEMBLY MECHANICAL SHOCK

$28.00 $56.00

JEDEC JESD82-7A

JEDEC JESD82-7A

DEFINITION OF THE SSTU32864 1.8-V CONFIGURABLE REGISTERED BUFFER FOR DDR2 RDIMM APPLICATIONS

$29.00 $59.00

JEDEC JESD82-6A

JEDEC JESD82-6A

DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS

$29.00 $59.00